1. Field of the Invention
The present invention relates to an interleaved power factor correction circuit capable of lengthening a life span of an overall system and preventing unnecessary power wastage.
2. Description of the Related Art
Recently, national governments around the world have urged the effective use of energy in conformity with energy efficiency policies, and in particular, effective use of energy in electronic products or home appliances is widely recommended.
Thus, according to such recommendations, a remedial circuit for effectively using energy has been applied to power supply devices supplying power to electronic products, home appliances, and the like.
The remedial circuit may be, for example, a power factor correction circuit. A power factor correction circuit is a circuit for switching input power to adjust a phase difference (power factor) between a current and a voltage of the input power to effectively transfer power to a rear stage.
Among power factor correction circuits, a boost power factor correction circuit has generally been used, but it has relatively low efficiency, high internal currents, voltage ripples, electromagnetic interference (EMI) noise, and the like, and thus, the application thereof to a middle or large-scale power source device may be problematic.
In order to solve these problems, in the case of a related art interleaved boost power factor correction (PFC) circuit configured by connecting boost PFC circuits in parallel, the respective boost PFCs connected in parallel are equally operated with a time difference during a switching period with respect to overall output power, to thereby simultaneously reduce ripples in an input current and those in an output voltage. Accordingly, a size of an input EMI filter can be reduced. However, the interleaved boost power factor correction circuit has a problem in that, even when a load connected to a load stage is relatively light, both of two phases connected in parallel operate, wasting power due to unnecessary switching loss, lowering power factor correction efficiency, and reducing a life span of an overall system.
Among related art documents, Patent document 1 relates to an interleaved PFC flyback converter in which one of switches Q1 and Q2 is switched alone when a light load is detected, but without disclosing a technique of reducing switching loss.